Analog Layout Design Co-op — High‑Speed CMOS
Job Description
A leading technology company in Ottawa is seeking an analog layout design co-op to work on advanced high-speed circuits. The ideal candidate will create layout designs for analog circuits such as ADC/DAC and PLL, under the guidance of a principal layout engineer. Responsibilities include conducting feasibility studies, layout creation, and quality verification. This internship offers hands-on experience in a dynamic work environment, along with competitive compensation ranging from $25.00 to $34.00 per hour.#J-18808-Ljbffr
How to Apply
Ready to start your career as a Analog Layout Design Co-op — High‑Speed CMOS at Ciena?
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Frequently Asked Questions
Who is hiring?▼
This role is with Ciena in Ottawa.
Is this a remote position?▼
This appears to be an on-site role in Ottawa.
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What skills are needed?▼
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