Design Verification Engineer

Job Description

<p><b>Note:- Candidate must have 6+ years of experience with Design Verification Engineer(Not Junior/Intermediate role)</b></p><p><br></p><p><b>THE ROLE:</b></p><p>We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve Client's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.</p><p><br></p><p><b>THE PERSON:</b></p><p>You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.</p><p><br></p><p><b>KEY RESPONSIBILITIES:</b></p><p>• Develop/Maintain tests for functional verification with UVM verification at the subsystem level • Build testbench components to support the next generation IP • Maintain or improve current test libraries to support IP level testing • Technically lead IPs in Control Fabric, • Have exposure to AXI protocol and Bootcode Verification • Provide technical support to other teams</p><p><br></p><p><b>PREFERRED EXPERIENCE:</b></p><p>• 5+ years' experience required</p><p>• Good at C/C++</p><p>• Good at SV and UVM</p><p>• Good scripting knowledge in Perl, Ruby and Makefile • Familiarity with System Verilog and modern verification libraries like UVM</p><p><br></p><p><b>ACADEMIC CREDENTIALS:</b></p><p>• Bachelors (required) or Masters degree in computer engineering/Electrical Engineering</p><p></p>